AMD and Nvidia’s GPUs are currently built on 4 nm-class silicon by TSMC. And they’re not exactly cheap. Meanwhile, TSMC has indicated that it would like to put the prices it charges to chip designers up. In that context, the prospect of IBM’s newly announced sub-1 nm silicon is both very exciting and totally terrifying.
As for the details, IBM is claiming “the introduction of the world’s first sub-1 nanometer (nm) chip technology, featuring a revolutionary transistor architecture at the 0.7 nm, or 7 angstrom node.”
It’s notoriously difficult to compare silicon nodes from competing manufacturers, such as TSMC or Intel’s fabs, or indeed IBM’s. Moreover, the actual size of elements inside chips has become ever more disconnected from the node names, to the extent that many industry observers now consider the likes of TSMC N3 or Intel 18A to be marketing terms as opposed to technical specifications.
But with that proviso duly delineated and for whatever it is worth, the most advanced silicon made by TSMC that you or I can actually buy in devices is its N3 or 3 nm node, while Intel is selling chips, such as its latest Panther Lake laptop CPUs, that are partly built on its 18A node.
Ostensibly, 18A or 18 angstroms is equivalent to 1.8 nm and so Intel’s technology is more advanced. In reality, most analysts make the transistor density of TSMC’s N3 at least on par with Intel 18A, if not better. Meanwhile, TSMC has even more advanced N2 silicon spooling up as we speak, while Intel’s next-gen 14A node is a little further out.
Regardless of all that, IBM claims its new sub-1 nm node “packs nearly 100 billion transistors onto a chip the size of a fingernail.” That’s achieved, IBM says, thanks to “an entirely new transistor architecture, called ‘nanostack,’ the industry’s first known three-dimensional, nanosheet-based design. Nanostack represents a major advance beyond nanosheet technology, the industry’s current leading-edge architecture, invented by IBM.
“The nanostack design vertically stacks and staggers transistors, taking advantage of 3D sequential integration to pack more transistors onto a chip. The design also unlocks the use of different material combinations within each stacked layer, optimizing performance and power efficiency of each transistor independent of the other.”
Frankly, we’re not in a position to judge the veracity of such claims. What we can say is that, taken at face value, IBM’s technology promises to push chip production on yet again.
Does that keep Moore’s Law going? Not exactly, as Moore’s Law is as much about the cost of transistors as pure density. So, the big question is how much would IBM’s technology cost if adopted by the likes of Intel or TSMC?
In other words, it’s all very well being able to produce even more complex chips with even more incredible transistor counts. But if they’re so expensive none of us can afford them, what will it matter?
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